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Senior Verification Engineer

Senior Verification Engineer

Area of Expertise: I specialize in the planning and execution of full-cycle Verification and Validation (V&V) of Class III medical devices. Through my grasp of hardware and software fundamentals, I can help you determine where 80% of the testing effort should be spent, how to avoid retooling for every new product, and how to detect shifts in performance over time even when requirements are still being met. Through my understanding of regulatory guidelines and ISO standards, I can help you summarize and present test results in ways that exceed the expectations of increasingly risk-averse regulatory bodies and preempt any questions they may have. Value Proposition: ■ I create value by identifying areas of improvement and motivating stakeholders to adopt improved and more efficient processes. ■ I excel at conceptualizing, modeling complex systems, analyzing use cases, and examining proposed solutions from different angles including technical feasibility, regulatory implications, development cost, cost of adoption, impact on customers, fit to strategy, and ROI. ■ I have the ability to speak the language of different stakeholders in a matrix organization, get buy-in, and present technical information to various audiences including upper management, regulatory, marketing, and clinical staff. Key Skills: ■ Software Tools ► Microsoft Visual Studio ♦ C# ♦ .NET Framework ♦ C ♦ C++ ♦ Perl ♦ Java Script ♦ XML ♦ XML Schema ♦ MongoDB ♦ Access ♦ WinForms ♦ NUnit Framework ♦ GUI design ♦ Microsoft Office Automation ■ Software Concepts ► Unit tests ♦ collaborative development ♦ Test Driven Development/Design (TDD) ♦ Object-Oriented Programming (OOP) and Design ♦ Design Patterns ♦ Code Reusability ♦ Code Readability ■ Hardware Tools ► LabVIEW ♦ LabWindows/CVI ♦ MATLAB ♦ Verilog ■ Regulation ► Design controls ♦ Risk Management ♦ DHF ♦ CAPA ♦ FMEA ♦ Quality Systems ♦ ISO 13485 ♦ ISO 14971 ♦ ISO 9001 ♦ 21 CFR 800-1299

 

  • Software Verification

  • CAPA and Remediation Projects

  • WinForms

  • MongoDB

  • Software Validation

  • Object Oriented Methodology

  • Design Patterns

  • RISK ANALYSIS

  • System Design Analysis

  • Software Testing

  • Perl

  • Design Test Plans

  • Unit Testing

  • .NET

  • LabVIEW

  • Matlab

  • XML

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  • Job Posted: Monday, November 24, 2014

  • Expires On: Monday, June 22, 2015

  • Job Type: Permanent

  • Desired Salary: $110000/yr

  • Work Authorization: Citizen

Area of Expertise:
I specialize in the planning and execution of full-cycle Verification and Validation (V&V) of Class III medical devices. Through my grasp of hardware and software fundamentals, I can help you determine where 80% of the testing effort should be spent, how to avoid retooling for every new product, and how to detect shifts in performance over time even when requirements are still being met. Through my understanding of regulatory guidelines and ISO standards, I can help you summarize and present test results in ways that exceed the expectations of increasingly risk-averse regulatory bodies.

Value Proposition:
■ I create value by identifying areas of improvement and motivating stakeholders to adopt improved and more efficient processes. 
■ I excel at conceptualizing, modeling complex systems, analyzing use cases, and examining proposed solutions from different angles including technical feasibility, regulatory implications, development cost, cost of adoption, impact on customers, fit to strategy, and ROI.
■ I have the ability to speak the language of different stakeholders in a matrix organization, get buy-in, and present technical information to various audiences including upper management, regulatory, marketing, and clinical staff.

Key Skills:
■ Software Tools ► Microsoft Visual Studio ♦ C# ♦ .NET Framework ♦ C ♦ C++ ♦ Perl ♦ Java Script ♦ XML ♦ XML Schema ♦ MongoDB ♦ Access ♦ WinForms ♦ NUnit Framework ♦ GUI design ♦ Microsoft Office Automation
■ Software Concepts ► Unit tests ♦ collaborative development ♦ Test Driven Development/Design (TDD) ♦ Object-Oriented Programming (OOP) and Design ♦ Design Patterns ♦ Code Reusability ♦ Code Readability 
■ Hardware Tools ► LabVIEW ♦ LabWindows/CVI ♦ MATLAB ♦ Verilog
■ Regulation ► Design controls ♦ Risk Management ♦ DHF ♦ CAPA ♦ FMEA ♦ Quality Systems ♦ ISO 13485 ♦ ISO 14971 ♦ ISO 9001 ♦ 21 CFR 800-1299

  • Raleigh, NC

  • Phoenix, AZ

  • Tempe, AZ

  • Minneapolis, MN

  • Dallas, TX

  • Houston, TX

  • St. Petersburg, FL

Senior Verification Engineer, Technology & Platform Development @ (HIDDEN)

8/1/2011 - Current

Role Description

Current Project:A turnkey solution to standardize test data logging and to reduce time spent collecting, formatting, and printing test reports. The system automatically generates test reports in different formats depending on the target customer and is capable of generating formal verification reports for all tests in less than an hour, an activity which took 4 engineers 4 weeks to do before.■ Managed the subsystem verification effort of the next-generation implantable heart monitoring device. Developed a detailed Work Breakdown Structure (WBS) and an accurate timeline using Microsoft Project. Engaged the verification team in prioritizing tasks, focusing on value-added activities, and documenting planned future improvements in order to meet product development milestones and stay within budgeted time. The project became the first in the group’s history to be completed within schedule. ■ Reduced average embedded application development cycle time from 2-3 weeks to 2-3 days by introducing a modular and unified approach for developing embedded RAM applications and establishing a shared library to enhance readability and reusability. The new approach allowed collaborative code development—which was not conceivable before—and became the standard for embedded code development adopted by multiple groups.■ Standardized all automated tests and saved test developers and code reviewers a significant amount of time by developing a software tool that scans a test plan document and automatically generates a C# template in MS Visual Studio.■ Designed and developed automated tests targeted at verifying new hardware features and characterizing system interactions such as RF interaction with sensitive circuits and the sensing front-end noise floor. Influenced the design of next-generation hardware by successfully identifying issues and proposing fail-safe and testability improvements.

 

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